Merlin
03-22-2008, 03:36 AM
http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details
Late last month in Austria, Intel (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) presented Sun with roadmaps discussing details of its upcoming server (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) platforms, including the fairly secret Xeon Dunnington and Nehalem architectures. Unfortunately for some, this presentation ended up on Sun's public web server over the weekend.
Dunnington, Intel's 45nm six-core Xeon processor (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) from the Penryn family, will succeed the Xeon Tigerton processor. Whereas Tigerton is essentially two 65nm Core 2 (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) Duo processors fused on one package, Dunnington will be Intel's first Core 2 Duo processor with three dual-core banks. :eek: Dunnington includes 16MB of L3 cache shared by all six processors. Each pair of cores can also access 3MB of local L2 cache. The end result is a design very similar to the AMD Barcelona quad-core processor; however, each Barcelona core contains 512KB L2 cache, whereas Dunnington cores share L2 cache in pairs.
To sweeten the deal, all Dunnington processors (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) will be pin-compatible with Intel Tigerton processors, and work with the existing Clarksboro chipset. Intel's slide claims this processor will launch in the second half of 2008 -- a figure consistent with previous roadmaps from the company.
Late last month in Austria, Intel (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) presented Sun with roadmaps discussing details of its upcoming server (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) platforms, including the fairly secret Xeon Dunnington and Nehalem architectures. Unfortunately for some, this presentation ended up on Sun's public web server over the weekend.
Dunnington, Intel's 45nm six-core Xeon processor (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) from the Penryn family, will succeed the Xeon Tigerton processor. Whereas Tigerton is essentially two 65nm Core 2 (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) Duo processors fused on one package, Dunnington will be Intel's first Core 2 Duo processor with three dual-core banks. :eek: Dunnington includes 16MB of L3 cache shared by all six processors. Each pair of cores can also access 3MB of local L2 cache. The end result is a design very similar to the AMD Barcelona quad-core processor; however, each Barcelona core contains 512KB L2 cache, whereas Dunnington cores share L2 cache in pairs.
To sweeten the deal, all Dunnington processors (http://www.neowin.net/news/main/08/02/26/sun-leaks-6-core-intel-processor-details#) will be pin-compatible with Intel Tigerton processors, and work with the existing Clarksboro chipset. Intel's slide claims this processor will launch in the second half of 2008 -- a figure consistent with previous roadmaps from the company.